#include "tc_ioasicreg.h"
Go to the source code of this file.
Macros | |
#define | KMIN_PHYS_MIN 0x00000000 /* 512 Meg */ |
#define | KMIN_PHYS_MAX 0x1fffffff |
#define | KMIN_PHYS_MEMORY_START 0x00000000 |
#define | KMIN_PHYS_MEMORY_END 0x07ffffff /* 128 Meg in 8 slots */ |
#define | KMIN_PHYS_RESERVED 0x08000000 /* Reserved */ |
#define | KMIN_PHYS_MREGS_START 0x0c000000 /* Memory control registers */ |
#define | KMIN_PHYS_MREGS_END 0x0dffffff /* 32 Meg */ |
#define | KMIN_PHYS_CREGS_START 0x0e000000 /* CPU ASIC control regs */ |
#define | KMIN_PHYS_CREGS_END 0x0fffffff /* 32 Meg */ |
#define | KMIN_PHYS_TC_0_START 0x10000000 /* TURBOchannel, slot 0 */ |
#define | KMIN_PHYS_TC_0_END 0x13ffffff /* 64 Meg, option0 */ |
#define | KMIN_PHYS_TC_1_START 0x14000000 /* TURBOchannel, slot 1 */ |
#define | KMIN_PHYS_TC_1_END 0x17ffffff /* 64 Meg, option1 */ |
#define | KMIN_PHYS_TC_2_START 0x18000000 /* TURBOchannel, slot 2 */ |
#define | KMIN_PHYS_TC_2_END 0x1bffffff /* 64 Meg, option2 */ |
#define | KMIN_PHYS_TC_3_START 0x1c000000 /* TURBOchannel, slot 3 */ |
#define | KMIN_PHYS_TC_3_END 0x1fffffff /* 64 Meg, system devices */ |
#define | KMIN_PHYS_TC_START KMIN_PHYS_TC_0_START |
#define | KMIN_PHYS_TC_END KMIN_PHYS_TC_3_END /* 256 Meg */ |
#define | KMIN_TC_NSLOTS 4 |
#define | KMIN_TC_MIN 0 |
#define | KMIN_TC_MAX 2 /* don't look at system slot */ |
#define | KMIN_SYS_ASIC ( KMIN_PHYS_TC_3_START + 0x0000000 ) |
#define | KMIN_SYS_ROM_START ( KMIN_SYS_ASIC + IOASIC_SLOT_0_START ) |
#define | KMIN_SYS_ASIC_REGS ( KMIN_SYS_ASIC + IOASIC_SLOT_1_START ) |
#define | KMIN_SYS_ETHER_ADDRESS ( KMIN_SYS_ASIC + IOASIC_SLOT_2_START ) |
#define | KMIN_SYS_LANCE ( KMIN_SYS_ASIC + IOASIC_SLOT_3_START ) |
#define | KMIN_SYS_SCC_0 ( KMIN_SYS_ASIC + IOASIC_SLOT_4_START ) |
#define | KMIN_SYS_SCC_1 ( KMIN_SYS_ASIC + IOASIC_SLOT_6_START ) |
#define | KMIN_SYS_CLOCK ( KMIN_SYS_ASIC + IOASIC_SLOT_8_START ) |
#define | KMIN_SYS_SCSI ( KMIN_SYS_ASIC + IOASIC_SLOT_12_START ) |
#define | KMIN_SYS_SCSI_DMA ( KMIN_SYS_ASIC + IOASIC_SLOT_14_START ) |
#define | KMIN_SYS_BOOT_ROM_START ( KMIN_PHYS_TC_3_START + 0x3c00000 ) |
#define | KMIN_SYS_BOOT_ROM_END ( KMIN_PHYS_TC_3_START + 0x3c40000 ) |
#define | KMIN_INT_FPA IP_LEV7 /* Floating Point coproc */ |
#define | KMIN_INT_HALTB IP_LEV6 /* Halt button */ |
#define | KMIN_INT_TC3 IP_LEV5 /* TC slot 3, system */ |
#define | KMIN_INT_TC2 IP_LEV4 /* TC option slot 2 */ |
#define | KMIN_INT_TC1 IP_LEV3 /* TC option slot 1 */ |
#define | KMIN_INT_TC0 IP_LEV2 /* TC option slot 0 */ |
#define | KMIN_REG_MER 0x0c400000 /* Memory error register */ |
#define | KMIN_REG_MSR 0x0c800000 /* Memory size register */ |
#define | KMIN_REG_CNFG 0x0e000000 /* Config mem timeouts */ |
#define | KMIN_REG_AER 0x0e000004 /* Address error register */ |
#define | KMIN_REG_BOOT 0x0e000008 /* Boot 0 register */ |
#define | KMIN_REG_TIMEOUT 0x0e00000c /* Mem access timeout reg */ |
#define | KMIN_REG_SCSI_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCSI_DMAPTR ) |
#define | KMIN_REG_SCSI_DMANPTR ( KMIN_SYS_ASIC + IOASIC_SCSI_NEXTPTR ) |
#define | KMIN_REG_LANCE_DMAPTR ( KMIN_SYS_ASIC + IOASIC_LANCE_DMAPTR ) |
#define | KMIN_REG_SCC_T1_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCC_T1_DMAPTR ) |
#define | KMIN_REG_SCC_R1_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCC_R1_DMAPTR ) |
#define | KMIN_REG_SCC_T2_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCC_T2_DMAPTR ) |
#define | KMIN_REG_SCC_R2_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCC_R2_DMAPTR ) |
#define | KMIN_REG_CSR ( KMIN_SYS_ASIC + IOASIC_CSR ) |
#define | KMIN_REG_INTR ( KMIN_SYS_ASIC + IOASIC_INTR ) |
#define | KMIN_REG_IMSK ( KMIN_SYS_ASIC + IOASIC_IMSK ) |
#define | KMIN_REG_CURADDR ( KMIN_SYS_ASIC + IOASIC_CURADDR ) |
#define | KMIN_REG_LANCE_DECODE ( KMIN_SYS_ASIC + IOASIC_LANCE_DECODE ) |
#define | KMIN_REG_SCSI_DECODE ( KMIN_SYS_ASIC + IOASIC_SCSI_DECODE ) |
#define | KMIN_REG_SCC0_DECODE ( KMIN_SYS_ASIC + IOASIC_SCC0_DECODE ) |
#define | KMIN_REG_SCC1_DECODE ( KMIN_SYS_ASIC + IOASIC_SCC1_DECODE ) |
#define | KMIN_LANCE_CONFIG 3 |
#define | KMIN_SCSI_CONFIG 14 |
#define | KMIN_SCC0_CONFIG (0x10|4) |
#define | KMIN_SCC1_CONFIG (0x10|6) |
#define | KMIN_REG_SCSI_SCR ( KMIN_SYS_ASIC + IOASIC_SCSI_SCR ) |
#define | KMIN_REG_SCSI_SDR0 ( KMIN_SYS_ASIC + IOASIC_SCSI_SDR0 ) |
#define | KMIN_REG_SCSI_SDR1 ( KMIN_SYS_ASIC + IOASIC_SCSI_SDR1 ) |
#define | KMIN_MER_xxx 0xfffe30ff /* undefined */ |
#define | KMIN_MER_PAGE_BRY 0x00010000 /* rw: Page boundary error */ |
#define | KMIN_MER_TLEN 0x00008000 /* rw: Xfer length error */ |
#define | KMIN_MER_PARDIS 0x00004000 /* rw: Dis parity err intr */ |
#define | KMIN_MER_LASTBYTE 0x00000f00 /* rz: Last byte in error: */ |
#define | KMIN_LASTB31 0x00000800 /* upper byte of word */ |
#define | KMIN_LASTB23 0x00000400 /* .. through .. */ |
#define | KMIN_LASTB15 0x00000200 /* .. the .. */ |
#define | KMIN_LASTB07 0x00000100 /* .. lower byte */ |
#define | KMIN_MSR_SIZE_16Mb 0x00002000 /* rw: using 16Mb mem banks */ |
#define | KMIN_MSR_xxx 0xffffdfff /* undefined */ |
#define | KMIN_CNFG_VALUE_12Mhz 127 |
#define | KMIN_CNFG_VALUE_25Mhz 0 |
#define | KMIN_AER_ADDR_MASK 0x1ffffffc /* ro: phys addr in error */ |
#define | KMIN_BOOT_FROM_SLOT0 0x00000001 /* rw: diag board boot */ |
#define | KMIN_TIMEO_INTR 0x00000001 /* rc: intr pending */ |
#define | KMIN_CSR_DIAGDN 0x00008000 /* rw */ |
#define | KMIN_CSR_TXDIS_2 0x00004000 /* rw */ |
#define | KMIN_CSR_TXDIS_1 0x00002000 /* rw */ |
#define | KMIN_CSR_SCC_ENABLE 0x00000800 /* rw */ |
#define | KMIN_CSR_RTC_ENABLE 0x00000400 /* rw */ |
#define | KMIN_CSR_SCSI_ENABLE 0x00000200 /* rw */ |
#define | KMIN_CSR_LANCE_ENABLE 0x00000100 /* rw */ |
#define | KMIN_CSR_LEDS 0x000000ff /* rw */ |
#define | KMIN_INTR_NVR_JUMPER 0x00004000 /* ro */ |
#define | KMIN_INTR_TIMEOUT 0x00001000 /* ro */ |
#define | KMIN_INTR_NRMOD_JUMPER 0x00000400 /* ro */ |
#define | KMIN_INTR_SCSI 0x00000200 /* ro */ |
#define | KMIN_INTR_LANCE 0x00000100 /* ro */ |
#define | KMIN_INTR_SCC_1 0x00000080 /* ro */ |
#define | KMIN_INTR_SCC_0 0x00000040 /* ro */ |
#define | KMIN_INTR_CLOCK 0x00000020 /* ro */ |
#define | KMIN_INTR_PSWARN 0x00000010 /* ro */ |
#define | KMIN_INTR_SCSI_FIFO 0x00000004 /* ro */ |
#define | KMIN_INTR_PBNC 0x00000002 /* ro */ |
#define | KMIN_INTR_PBNO 0x00000001 /* ro */ |
#define | KMIN_INTR_ASIC 0xff0f0004 |
#define | KMIN_IM0 0xff0f13f0 /* all good ones enabled */ |
#define KMIN_AER_ADDR_MASK 0x1ffffffc /* ro: phys addr in error */ |
Definition at line 250 of file dec_kmin.h.
#define KMIN_BOOT_FROM_SLOT0 0x00000001 /* rw: diag board boot */ |
Definition at line 253 of file dec_kmin.h.
#define KMIN_CNFG_VALUE_12Mhz 127 |
Definition at line 246 of file dec_kmin.h.
#define KMIN_CNFG_VALUE_25Mhz 0 |
Definition at line 247 of file dec_kmin.h.
#define KMIN_CSR_DIAGDN 0x00008000 /* rw */ |
Definition at line 263 of file dec_kmin.h.
#define KMIN_CSR_LANCE_ENABLE 0x00000100 /* rw */ |
Definition at line 269 of file dec_kmin.h.
#define KMIN_CSR_LEDS 0x000000ff /* rw */ |
Definition at line 270 of file dec_kmin.h.
#define KMIN_CSR_RTC_ENABLE 0x00000400 /* rw */ |
Definition at line 267 of file dec_kmin.h.
#define KMIN_CSR_SCC_ENABLE 0x00000800 /* rw */ |
Definition at line 266 of file dec_kmin.h.
#define KMIN_CSR_SCSI_ENABLE 0x00000200 /* rw */ |
Definition at line 268 of file dec_kmin.h.
#define KMIN_CSR_TXDIS_1 0x00002000 /* rw */ |
Definition at line 265 of file dec_kmin.h.
#define KMIN_CSR_TXDIS_2 0x00004000 /* rw */ |
Definition at line 264 of file dec_kmin.h.
#define KMIN_IM0 0xff0f13f0 /* all good ones enabled */ |
Definition at line 287 of file dec_kmin.h.
#define KMIN_INT_FPA IP_LEV7 /* Floating Point coproc */ |
Definition at line 164 of file dec_kmin.h.
#define KMIN_INT_HALTB IP_LEV6 /* Halt button */ |
Definition at line 165 of file dec_kmin.h.
#define KMIN_INT_TC0 IP_LEV2 /* TC option slot 0 */ |
Definition at line 169 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_INT_TC1 IP_LEV3 /* TC option slot 1 */ |
Definition at line 168 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_INT_TC2 IP_LEV4 /* TC option slot 2 */ |
Definition at line 167 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_INT_TC3 IP_LEV5 /* TC slot 3, system */ |
Definition at line 166 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_INTR_ASIC 0xff0f0004 |
Definition at line 286 of file dec_kmin.h.
#define KMIN_INTR_CLOCK 0x00000020 /* ro */ |
Definition at line 281 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_INTR_LANCE 0x00000100 /* ro */ |
Definition at line 278 of file dec_kmin.h.
#define KMIN_INTR_NRMOD_JUMPER 0x00000400 /* ro */ |
Definition at line 276 of file dec_kmin.h.
#define KMIN_INTR_NVR_JUMPER 0x00004000 /* ro */ |
Definition at line 274 of file dec_kmin.h.
#define KMIN_INTR_PBNC 0x00000002 /* ro */ |
Definition at line 284 of file dec_kmin.h.
#define KMIN_INTR_PBNO 0x00000001 /* ro */ |
Definition at line 285 of file dec_kmin.h.
#define KMIN_INTR_PSWARN 0x00000010 /* ro */ |
Definition at line 282 of file dec_kmin.h.
#define KMIN_INTR_SCC_0 0x00000040 /* ro */ |
Definition at line 280 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_INTR_SCC_1 0x00000080 /* ro */ |
Definition at line 279 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_INTR_SCSI 0x00000200 /* ro */ |
Definition at line 277 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_INTR_SCSI_FIFO 0x00000004 /* ro */ |
Definition at line 283 of file dec_kmin.h.
#define KMIN_INTR_TIMEOUT 0x00001000 /* ro */ |
Definition at line 275 of file dec_kmin.h.
#define KMIN_LANCE_CONFIG 3 |
Definition at line 198 of file dec_kmin.h.
#define KMIN_LASTB07 0x00000100 /* .. lower byte */ |
Definition at line 220 of file dec_kmin.h.
Referenced by DEVICE_ACCESS().
#define KMIN_LASTB15 0x00000200 /* .. the .. */ |
Definition at line 219 of file dec_kmin.h.
Referenced by DEVICE_ACCESS().
#define KMIN_LASTB23 0x00000400 /* .. through .. */ |
Definition at line 218 of file dec_kmin.h.
Referenced by DEVICE_ACCESS().
#define KMIN_LASTB31 0x00000800 /* upper byte of word */ |
Definition at line 217 of file dec_kmin.h.
Referenced by DEVICE_ACCESS().
#define KMIN_MER_LASTBYTE 0x00000f00 /* rz: Last byte in error: */ |
Definition at line 216 of file dec_kmin.h.
#define KMIN_MER_PAGE_BRY 0x00010000 /* rw: Page boundary error */ |
Definition at line 213 of file dec_kmin.h.
Referenced by DEVICE_ACCESS().
#define KMIN_MER_PARDIS 0x00004000 /* rw: Dis parity err intr */ |
Definition at line 215 of file dec_kmin.h.
Referenced by DEVICE_ACCESS().
#define KMIN_MER_TLEN 0x00008000 /* rw: Xfer length error */ |
Definition at line 214 of file dec_kmin.h.
Referenced by DEVICE_ACCESS().
#define KMIN_MER_xxx 0xfffe30ff /* undefined */ |
Definition at line 212 of file dec_kmin.h.
#define KMIN_MSR_SIZE_16Mb 0x00002000 /* rw: using 16Mb mem banks */ |
Definition at line 223 of file dec_kmin.h.
Referenced by DEVICE_ACCESS(), and DEVINIT().
#define KMIN_MSR_xxx 0xffffdfff /* undefined */ |
Definition at line 224 of file dec_kmin.h.
#define KMIN_PHYS_CREGS_END 0x0fffffff /* 32 Meg */ |
Definition at line 124 of file dec_kmin.h.
#define KMIN_PHYS_CREGS_START 0x0e000000 /* CPU ASIC control regs */ |
Definition at line 123 of file dec_kmin.h.
#define KMIN_PHYS_MAX 0x1fffffff |
Definition at line 107 of file dec_kmin.h.
#define KMIN_PHYS_MEMORY_END 0x07ffffff /* 128 Meg in 8 slots */ |
Definition at line 113 of file dec_kmin.h.
#define KMIN_PHYS_MEMORY_START 0x00000000 |
Definition at line 112 of file dec_kmin.h.
#define KMIN_PHYS_MIN 0x00000000 /* 512 Meg */ |
Definition at line 106 of file dec_kmin.h.
#define KMIN_PHYS_MREGS_END 0x0dffffff /* 32 Meg */ |
Definition at line 122 of file dec_kmin.h.
#define KMIN_PHYS_MREGS_START 0x0c000000 /* Memory control registers */ |
Definition at line 121 of file dec_kmin.h.
#define KMIN_PHYS_RESERVED 0x08000000 /* Reserved */ |
Definition at line 118 of file dec_kmin.h.
#define KMIN_PHYS_TC_0_END 0x13ffffff /* 64 Meg, option0 */ |
Definition at line 127 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_PHYS_TC_0_START 0x10000000 /* TURBOchannel, slot 0 */ |
Definition at line 126 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_PHYS_TC_1_END 0x17ffffff /* 64 Meg, option1 */ |
Definition at line 130 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_PHYS_TC_1_START 0x14000000 /* TURBOchannel, slot 1 */ |
Definition at line 129 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_PHYS_TC_2_END 0x1bffffff /* 64 Meg, option2 */ |
Definition at line 133 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_PHYS_TC_2_START 0x18000000 /* TURBOchannel, slot 2 */ |
Definition at line 132 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_PHYS_TC_3_END 0x1fffffff /* 64 Meg, system devices */ |
Definition at line 136 of file dec_kmin.h.
#define KMIN_PHYS_TC_3_START 0x1c000000 /* TURBOchannel, slot 3 */ |
Definition at line 135 of file dec_kmin.h.
#define KMIN_PHYS_TC_END KMIN_PHYS_TC_3_END /* 256 Meg */ |
Definition at line 139 of file dec_kmin.h.
#define KMIN_PHYS_TC_START KMIN_PHYS_TC_0_START |
Definition at line 138 of file dec_kmin.h.
#define KMIN_REG_AER 0x0e000004 /* Address error register */ |
Definition at line 178 of file dec_kmin.h.
#define KMIN_REG_BOOT 0x0e000008 /* Boot 0 register */ |
Definition at line 179 of file dec_kmin.h.
#define KMIN_REG_CNFG 0x0e000000 /* Config mem timeouts */ |
Definition at line 177 of file dec_kmin.h.
#define KMIN_REG_CSR ( KMIN_SYS_ASIC + IOASIC_CSR ) |
Definition at line 189 of file dec_kmin.h.
#define KMIN_REG_CURADDR ( KMIN_SYS_ASIC + IOASIC_CURADDR ) |
Definition at line 192 of file dec_kmin.h.
#define KMIN_REG_IMSK ( KMIN_SYS_ASIC + IOASIC_IMSK ) |
Definition at line 191 of file dec_kmin.h.
#define KMIN_REG_INTR ( KMIN_SYS_ASIC + IOASIC_INTR ) |
Definition at line 190 of file dec_kmin.h.
#define KMIN_REG_LANCE_DECODE ( KMIN_SYS_ASIC + IOASIC_LANCE_DECODE ) |
Definition at line 194 of file dec_kmin.h.
#define KMIN_REG_LANCE_DMAPTR ( KMIN_SYS_ASIC + IOASIC_LANCE_DMAPTR ) |
Definition at line 184 of file dec_kmin.h.
#define KMIN_REG_MER 0x0c400000 /* Memory error register */ |
Definition at line 174 of file dec_kmin.h.
Referenced by DEVINIT().
#define KMIN_REG_MSR 0x0c800000 /* Memory size register */ |
Definition at line 175 of file dec_kmin.h.
Referenced by DEVINIT().
#define KMIN_REG_SCC0_DECODE ( KMIN_SYS_ASIC + IOASIC_SCC0_DECODE ) |
Definition at line 196 of file dec_kmin.h.
#define KMIN_REG_SCC1_DECODE ( KMIN_SYS_ASIC + IOASIC_SCC1_DECODE ) |
Definition at line 197 of file dec_kmin.h.
#define KMIN_REG_SCC_R1_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCC_R1_DMAPTR ) |
Definition at line 186 of file dec_kmin.h.
#define KMIN_REG_SCC_R2_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCC_R2_DMAPTR ) |
Definition at line 188 of file dec_kmin.h.
#define KMIN_REG_SCC_T1_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCC_T1_DMAPTR ) |
Definition at line 185 of file dec_kmin.h.
#define KMIN_REG_SCC_T2_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCC_T2_DMAPTR ) |
Definition at line 187 of file dec_kmin.h.
#define KMIN_REG_SCSI_DECODE ( KMIN_SYS_ASIC + IOASIC_SCSI_DECODE ) |
Definition at line 195 of file dec_kmin.h.
#define KMIN_REG_SCSI_DMANPTR ( KMIN_SYS_ASIC + IOASIC_SCSI_NEXTPTR ) |
Definition at line 183 of file dec_kmin.h.
#define KMIN_REG_SCSI_DMAPTR ( KMIN_SYS_ASIC + IOASIC_SCSI_DMAPTR ) |
Definition at line 182 of file dec_kmin.h.
#define KMIN_REG_SCSI_SCR ( KMIN_SYS_ASIC + IOASIC_SCSI_SCR ) |
Definition at line 203 of file dec_kmin.h.
#define KMIN_REG_SCSI_SDR0 ( KMIN_SYS_ASIC + IOASIC_SCSI_SDR0 ) |
Definition at line 204 of file dec_kmin.h.
#define KMIN_REG_SCSI_SDR1 ( KMIN_SYS_ASIC + IOASIC_SCSI_SDR1 ) |
Definition at line 205 of file dec_kmin.h.
#define KMIN_REG_TIMEOUT 0x0e00000c /* Mem access timeout reg */ |
Definition at line 180 of file dec_kmin.h.
#define KMIN_SCC0_CONFIG (0x10|4) |
Definition at line 200 of file dec_kmin.h.
#define KMIN_SCC1_CONFIG (0x10|6) |
Definition at line 201 of file dec_kmin.h.
#define KMIN_SCSI_CONFIG 14 |
Definition at line 199 of file dec_kmin.h.
#define KMIN_SYS_ASIC ( KMIN_PHYS_TC_3_START + 0x0000000 ) |
Definition at line 148 of file dec_kmin.h.
Referenced by DEVINIT().
#define KMIN_SYS_ASIC_REGS ( KMIN_SYS_ASIC + IOASIC_SLOT_1_START ) |
Definition at line 150 of file dec_kmin.h.
#define KMIN_SYS_BOOT_ROM_END ( KMIN_PHYS_TC_3_START + 0x3c40000 ) |
Definition at line 159 of file dec_kmin.h.
#define KMIN_SYS_BOOT_ROM_START ( KMIN_PHYS_TC_3_START + 0x3c00000 ) |
Definition at line 158 of file dec_kmin.h.
#define KMIN_SYS_CLOCK ( KMIN_SYS_ASIC + IOASIC_SLOT_8_START ) |
Definition at line 155 of file dec_kmin.h.
Referenced by MACHINE_SETUP().
#define KMIN_SYS_ETHER_ADDRESS ( KMIN_SYS_ASIC + IOASIC_SLOT_2_START ) |
Definition at line 151 of file dec_kmin.h.
#define KMIN_SYS_LANCE ( KMIN_SYS_ASIC + IOASIC_SLOT_3_START ) |
Definition at line 152 of file dec_kmin.h.
#define KMIN_SYS_ROM_START ( KMIN_SYS_ASIC + IOASIC_SLOT_0_START ) |
Definition at line 149 of file dec_kmin.h.
#define KMIN_SYS_SCC_0 ( KMIN_SYS_ASIC + IOASIC_SLOT_4_START ) |
Definition at line 153 of file dec_kmin.h.
#define KMIN_SYS_SCC_1 ( KMIN_SYS_ASIC + IOASIC_SLOT_6_START ) |
Definition at line 154 of file dec_kmin.h.
#define KMIN_SYS_SCSI ( KMIN_SYS_ASIC + IOASIC_SLOT_12_START ) |
Definition at line 156 of file dec_kmin.h.
#define KMIN_SYS_SCSI_DMA ( KMIN_SYS_ASIC + IOASIC_SLOT_14_START ) |
Definition at line 157 of file dec_kmin.h.
#define KMIN_TC_MAX 2 /* don't look at system slot */ |
Definition at line 143 of file dec_kmin.h.
#define KMIN_TC_MIN 0 |
Definition at line 142 of file dec_kmin.h.
#define KMIN_TC_NSLOTS 4 |
Definition at line 141 of file dec_kmin.h.
#define KMIN_TIMEO_INTR 0x00000001 /* rc: intr pending */ |
Definition at line 256 of file dec_kmin.h.