mii.h Source File
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Go to the documentation of this file. 3 #ifndef _DEV_MII_MII_H_ 4 #define _DEV_MII_MII_H_ 38 #define MII_ADDRBITS 5 39 #define MII_ADDRMASK 0x1f 45 #define MII_COMMAND_START 0x01 46 #define MII_COMMAND_READ 0x02 47 #define MII_COMMAND_WRITE 0x01 48 #define MII_COMMAND_ACK 0x02 51 #define BMCR_RESET 0x8000 52 #define BMCR_LOOP 0x4000 53 #define BMCR_SPEED0 0x2000 54 #define BMCR_AUTOEN 0x1000 55 #define BMCR_PDOWN 0x0800 56 #define BMCR_ISO 0x0400 57 #define BMCR_STARTNEG 0x0200 58 #define BMCR_FDX 0x0100 59 #define BMCR_CTEST 0x0080 60 #define BMCR_SPEED1 0x0040 62 #define BMCR_S10 0x0000 63 #define BMCR_S100 BMCR_SPEED0 64 #define BMCR_S1000 BMCR_SPEED1 66 #define BMCR_SPEED(x) ((x) & (BMCR_SPEED0|BMCR_SPEED1)) 69 #define BMSR_100T4 0x8000 70 #define BMSR_100TXFDX 0x4000 71 #define BMSR_100TXHDX 0x2000 72 #define BMSR_10TFDX 0x1000 73 #define BMSR_10THDX 0x0800 74 #define BMSR_100T2FDX 0x0400 75 #define BMSR_100T2HDX 0x0200 76 #define BMSR_EXTSTAT 0x0100 77 #define BMSR_MFPS 0x0040 78 #define BMSR_ACOMP 0x0020 79 #define BMSR_RFAULT 0x0010 80 #define BMSR_ANEG 0x0008 81 #define BMSR_LINK 0x0004 82 #define BMSR_JABBER 0x0002 83 #define BMSR_EXTCAP 0x0001 91 #define BMSR_MEDIAMASK (BMSR_100T4|BMSR_100TXFDX|BMSR_100TXHDX| \ 92 BMSR_10TFDX|BMSR_10THDX|BMSR_100T2FDX|BMSR_100T2HDX) 98 #define BMSR_MEDIA_TO_ANAR(x) (((x) & BMSR_MEDIAMASK) >> 6) 100 #define MII_PHYIDR1 0x02 102 #define MII_PHYIDR2 0x03 103 #define IDR2_OUILSB 0xfc00 104 #define IDR2_MODEL 0x03f0 105 #define IDR2_REV 0x000f 107 #define MII_ANAR 0x04 109 #define ANAR_NP 0x8000 110 #define ANAR_ACK 0x4000 111 #define ANAR_RF 0x2000 113 #define ANAR_FC 0x0400 114 #define ANAR_T4 0x0200 115 #define ANAR_TX_FD 0x0100 116 #define ANAR_TX 0x0080 117 #define ANAR_10_FD 0x0040 118 #define ANAR_10 0x0020 119 #define ANAR_CSMA 0x0001 120 #define ANAR_PAUSE_NONE (0 << 10) 121 #define ANAR_PAUSE_SYM (1 << 10) 122 #define ANAR_PAUSE_ASYM (2 << 10) 123 #define ANAR_PAUSE_TOWARDS (3 << 10) 126 #define ANAR_X_FD 0x0020 127 #define ANAR_X_HD 0x0040 128 #define ANAR_X_PAUSE_NONE (0 << 7) 129 #define ANAR_X_PAUSE_SYM (1 << 7) 130 #define ANAR_X_PAUSE_ASYM (2 << 7) 131 #define ANAR_X_PAUSE_TOWARDS (3 << 7) 133 #define MII_ANLPAR 0x05 135 #define ANLPAR_NP 0x8000 136 #define ANLPAR_ACK 0x4000 137 #define ANLPAR_RF 0x2000 138 #define ANLPAR_FC 0x0400 139 #define ANLPAR_T4 0x0200 140 #define ANLPAR_TX_FD 0x0100 141 #define ANLPAR_TX 0x0080 142 #define ANLPAR_10_FD 0x0040 143 #define ANLPAR_10 0x0020 144 #define ANLPAR_CSMA 0x0001 145 #define ANLPAR_PAUSE_MASK (3 << 10) 146 #define ANLPAR_PAUSE_NONE (0 << 10) 147 #define ANLPAR_PAUSE_SYM (1 << 10) 148 #define ANLPAR_PAUSE_ASYM (2 << 10) 149 #define ANLPAR_PAUSE_TOWARDS (3 << 10) 151 #define ANLPAR_X_FD 0x0020 152 #define ANLPAR_X_HD 0x0040 153 #define ANLPAR_X_PAUSE_MASK (3 << 7) 154 #define ANLPAR_X_PAUSE_NONE (0 << 7) 155 #define ANLPAR_X_PAUSE_SYM (1 << 7) 156 #define ANLPAR_X_PAUSE_ASYM (2 << 7) 157 #define ANLPAR_X_PAUSE_TOWARDS (3 << 7) 159 #define MII_ANER 0x06 161 #define ANER_MLF 0x0010 162 #define ANER_LPNP 0x0008 163 #define ANER_NP 0x0004 164 #define ANER_PAGE_RX 0x0002 165 #define ANER_LPAN 0x0001 167 #define MII_ANNP 0x07 170 #define MII_ANLPRNP 0x08 174 #define MII_100T2CR 0x09 175 #define GTCR_TEST_MASK 0xe000 176 #define GTCR_MAN_MS 0x1000 177 #define GTCR_ADV_MS 0x0800 178 #define GTCR_PORT_TYPE 0x0400 179 #define GTCR_ADV_1000TFDX 0x0200 180 #define GTCR_ADV_1000THDX 0x0100 183 #define MII_100T2SR 0x0a 184 #define GTSR_MAN_MS_FLT 0x8000 185 #define GTSR_MS_RES 0x4000 186 #define GTSR_LRS 0x2000 187 #define GTSR_RRS 0x1000 188 #define GTSR_LP_1000TFDX 0x0800 189 #define GTSR_LP_1000THDX 0x0400 190 #define GTSR_LP_ASM_DIR 0x0200 191 #define GTSR_IDLE_ERR 0x00ff 193 #define MII_PSECR 0x0b 194 #define PSECR_PACTLMASK 0x000c 195 #define PSECR_PSEENMASK 0x0003 196 #define PSECR_PINOUTB 0x0008 197 #define PSECR_PINOUTA 0x0004 198 #define PSECR_FOPOWTST 0x0002 199 #define PSECR_PSEEN 0x0001 200 #define PSECR_PSEDIS 0x0000 202 #define MII_PSESR 0x0c 203 #define PSESR_PWRDENIED 0x1000 204 #define PSESR_VALSIG 0x0800 205 #define PSESR_INVALSIG 0x0400 206 #define PSESR_SHORTCIRC 0x0200 207 #define PSESR_OVERLOAD 0x0100 208 #define PSESR_MPSABSENT 0x0080 209 #define PSESR_PDCLMASK 0x0070 210 #define PSESR_STATMASK 0x000e 211 #define PSESR_PAIRCTABL 0x0001 212 #define PSESR_PDCL_4 (4 << 4) 213 #define PSESR_PDCL_3 (3 << 4) 214 #define PSESR_PDCL_2 (2 << 4) 215 #define PSESR_PDCL_1 (1 << 4) 216 #define PSESR_PDCL_0 (0 << 4) 218 #define MII_MMDACR 0x0d 219 #define MMDACR_FUNCMASK 0xc000 220 #define MMDACR_DADDRMASK 0x001f 221 #define MMDACR_FN_ADDRESS (0 << 14) 222 #define MMDACR_FN_DATANPI (1 << 14) 223 #define MMDACR_FN_DATAPIRW (2 << 14) 224 #define MMDACR_FN_DATAPIW (3 << 14) 226 #define MII_MMDAADR 0x0e 228 #define MII_EXTSR 0x0f 229 #define EXTSR_1000XFDX 0x8000 230 #define EXTSR_1000XHDX 0x4000 231 #define EXTSR_1000TFDX 0x2000 232 #define EXTSR_1000THDX 0x1000 234 #define EXTSR_MEDIAMASK (EXTSR_1000XFDX|EXTSR_1000XHDX| \ 235 EXTSR_1000TFDX|EXTSR_1000THDX)
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