58 #define DEV_I80321_LENGTH VERDE_PMMR_SIZE 76 uint32_t
mcu_reg[0x100 /
sizeof(uint32_t)];
83 static void i80321_assert(
struct i80321_data *d, uint32_t linemask)
89 static void i80321_deassert(
struct i80321_data *d, uint32_t linemask)
110 if (interrupt->
line == 1 << 9 &&
114 i80321_deassert(d, interrupt->
line);
119 static void tmr0_tick(
struct timer *
t,
void *extra)
131 i80321_assert(d, 1 << 9);
134 i80321_deassert(d, 1 << 9);
143 uint64_t idata = 0, odata = 0;
144 const char *n = NULL;
145 int bus, dev, func,
reg;
151 if (relative_addr >= 0x100 && relative_addr < 0x140) {
177 switch (relative_addr) {
198 if (writeflag ==
MEM_WRITE && idata == 0x30) {
232 switch (relative_addr) {
234 odata = tmp >> 8;
break;
236 odata = tmp >> 16;
break;
238 odata = tmp >> 24;
break;
247 for (i=0; i<len; i++) {
248 uint8_t b = idata >> (i*8);
249 tmp &= ~(0xff << ((r+i)*8));
250 tmp |= b << ((r+i)*8);
263 n =
"MCU_SDIR (DDR SDRAM Init Register)";
266 n =
"MCU_SDCR (DDR SDRAM Control Register)";
269 n =
"MCU_SDBR (SDRAM Base Register)";
272 n =
"MCU_SBR0 (SDRAM Boundary 0)";
275 n =
"MCU_SBR1 (SDRAM Boundary 1)";
278 n =
"MCU_ECCR (ECC Control Register)";
281 n =
"MCU_RFR (Refresh Frequency Register)";
284 n =
"MCU_DBUDSR (Data Bus Pull-up Drive Strength)";
287 n =
"MCU_DBDDSR (Data Bus Pull-down Drive Strength)";
290 n =
"MCU_CUDSR (Clock Pull-up Drive Strength)";
293 n =
"MCU_CDDSR (Clock Pull-down Drive Strength)";
296 n =
"MCU_CEUDSR (Clock En Pull-up Drive Strength)";
299 n =
"MCU_CEDDSR (Clock En Pull-down Drive Strength)";
302 n =
"MCU_CSUDSR (Chip Sel Pull-up Drive Strength)";
305 n =
"MCU_CSDDSR (Chip Sel Pull-down Drive Strength)";
308 n =
"MCU_REUDSR (Rx En Pull-up Drive Strength)";
311 n =
"MCU_REDDSR (Rx En Pull-down Drive Strength)";
315 n =
"MCU_ABUDSR (Addr Bus Pull-up Drive Strength)";
318 n =
"MCU_ABDDSR (Addr Bus Pull-down Drive Strength)";
323 n =
"PBIU_PBCR (PBIU Control Register)";
326 n =
"PBIU_PBBAR0 (PBIU Base Address Register 0)";
329 n =
"PBIU_PBLR0 (PBIU Limit Register 0)";
332 n =
"PBIU_PBBAR1 (PBIU Base Address Register 1)";
335 n =
"PBIU_PBLR1 (PBIU Limit Register 1)";
338 n =
"PBIU_PBBAR2 (PBIU Base Address Register 2)";
341 n =
"PBIU_PBLR2 (PBIU Limit Register 2)";
350 n =
"I2C 0, IIC_ICR (control register)";
353 n =
"I2C 0, IIC_ISR (status register)";
356 n =
"I2C 0, IIC_ISAR (slave address register)";
359 n =
"I2C 0, IIC_IDBR (data buffer register)";
363 n =
"I2C 1, IIC_ICR (control register)";
366 n =
"I2C 1, IIC_ISR (status register)";
371 n =
"I2C 1, IIC_ISAR (slave address register)";
374 n =
"I2C 1, IIC_IDBR (data buffer register)";
378 default:
if (writeflag ==
MEM_READ) {
379 fatal(
"[ i80321: read from 0x%x ]\n",
382 fatal(
"[ i80321: write to 0x%x: 0x%llx ]\n",
383 (
int)relative_addr, (
long long)idata);
390 debug(
"[ i80321: read from %s: 0x%llx ]\n",
391 n, (
long long)idata);
393 debug(
"[ i80321: write to %s: 0x%llx ]\n",
394 n, (
long long)idata);
423 for (i=0; i<32; i++) {
426 snprintf(tmpstr2,
sizeof(tmpstr2),
"%s.i80321.%i",
428 memset(&templ, 0,
sizeof(templ));
430 templ.
name = tmpstr2;
465 "TODO: isa_irqbase" );
uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
void fatal(const char *fmt,...)
uint32_t mcu_reg[0x100/sizeof(uint32_t)]
void(* interrupt_assert)(struct interrupt *)
void interrupt_handler_register(struct interrupt *templ)
void(* interrupt_deassert)(struct interrupt *)
struct pci_data * pci_bus
struct interrupt tmr0_irq
int exit_without_entering_debugger
#define CHECK_ALLOCATION(ptr)
void bus_pci_setaddr(struct cpu *cpu, struct pci_data *pci_data, int bus, int device, int function, int reg)
struct timer * timer_add(double freq, void(*timer_tick)(struct timer *timer, void *extra), void *extra)
#define INTERRUPT_ASSERT(istruct)
#define DEV_I80321_LENGTH
#define INTERRUPT_CONNECT(name, istruct)
int pending_tmr0_interrupts
struct interrupt tmr1_irq
void i80321_interrupt_deassert(struct interrupt *interrupt)
void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len, uint64_t data)
void memory_device_register(struct memory *mem, const char *, uint64_t baseaddr, uint64_t len, int(*f)(struct cpu *, struct memory *, uint64_t, unsigned char *, size_t, int, void *), void *extra, int flags, unsigned char *dyntrans_data)
void bus_pci_decompose_1(uint32_t t, int *bus, int *dev, int *func, int *reg)
struct pci_data * bus_pci_init(struct machine *machine, const char *irq_path, uint64_t pci_actual_io_offset, uint64_t pci_actual_mem_offset, uint64_t pci_portbase, uint64_t pci_membase, const char *pci_irqbase, uint64_t isa_portbase, uint64_t isa_membase, const char *isa_irqbase)
addr & if(addr >=0x24 &&page !=NULL)
uint32_t i2c_reg[VERDE_I2C_SIZE/sizeof(uint32_t)]
void machine_add_tickfunction(struct machine *machine, void(*func)(struct cpu *, void *), void *extra, int clockshift)
void bus_pci_data_access(struct cpu *cpu, struct pci_data *pci_data, uint64_t *data, int len, int writeflag)
void i80321_interrupt_assert(struct interrupt *interrupt)
#define INTERRUPT_DEASSERT(istruct)