vripreg.h File Reference

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vripreg.h File Reference

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Macros

#define VRIP_NO_ADDR   0x00000000
 
#define VR4181_BCU_ADDR   0x0a000000
 
#define VR4181_DMAAU_ADDR   VRIP_NO_ADDR
 
#define VR4181_DCU_ADDR   VRIP_NO_ADDR
 
#define VR4181_CMU_ADDR   0x0a000004
 
#define VR4181_ICU_ADDR   0x0a000080
 
#define VR4181_PMU_ADDR   0x0a0000a0
 
#define VR4181_RTC_ADDR   0x0a0000c0
 
#define VR4181_DSU_ADDR   0x0a0000e0
 
#define VR4181_GIU_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4181_PIU_ADDR   0x0a000122
 
#define VR4181_AIU_ADDR   0x0a000160
 
#define VR4181_KIU_ADDR   0x0a000180
 
#define VR4181_DSIU_ADDR   0x0a0001a0
 
#define VR4181_LED_ADDR   0x0a000240
 
#define VR4181_SIU_ADDR   0x0c000010
 
#define VR4181_HSP_ADDR   0x0a000020
 
#define VR4181_FIR_ADDR   0x0a000000 /* XXX */
 
#define VR4181_MEMCON_ADDR   0x0a000300
 
#define VR4181_ISABRG_ADDR   0x0b0002c0
 
#define VR4181_ECU_ADDR   0x0b0008e0
 
#define VR4181_DCU81_ADDR   0x0a000020
 
#define VR4181_CSI81_ADDR   0x0b000900
 
#define VR4181_GIU81_ADDR   0x0b000300
 
#define VR4181_LCD_ADDR   0x0a000400
 
#define VR4181_SIU1_ADDR   0x0c000000
 
#define VR4181_SCU_ARR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4181_SDRAMU_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4181_PCI_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4181_PCICONF_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4181_CSI_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4102_BCU_ADDR   0x0b000000
 
#define VR4102_DMAAU_ADDR   0x0b000020
 
#define VR4102_DCU_ADDR   0x0b000040
 
#define VR4102_CMU_ADDR   0x0b000060
 
#define VR4102_ICU_ADDR   0x0b000080
 
#define VR4102_PMU_ADDR   0x0b0000a0
 
#define VR4102_RTC_ADDR   0x0b0000c0
 
#define VR4102_DSU_ADDR   0x0b0000e0
 
#define VR4102_GIU_ADDR   0x0b000100
 
#define VR4102_PIU_ADDR   0x0b000120
 
#define VR4102_AIU_ADDR   0x0b000160
 
#define VR4102_KIU_ADDR   0x0b000180
 
#define VR4102_DSIU_ADDR   0x0b0001a0
 
#define VR4102_LED_ADDR   0x0b000240
 
#define VR4102_SIU_ADDR   0x0c000000
 
#define VR4102_HSP_ADDR   0x0c000020
 
#define VR4102_FIR_ADDR   0x0b000000 /* XXX */
 
#define VR4102_MEMCON_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4102_ISABRG_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4102_ECU_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4102_DCU81_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4102_CSI81_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4102_GIU81_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4102_SIU1_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4102_SCU_ARR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4102_SDRAMU_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4102_PCI_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4102_PCICONF_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4102_CSI_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4122_BCU_ADDR   0x0f000000
 
#define VR4122_DMAAU_ADDR   0x0f000020
 
#define VR4122_DCU_ADDR   0x0f000040
 
#define VR4122_CMU_ADDR   0x0f000060
 
#define VR4122_ICU_ADDR   0x0f000080
 
#define VR4122_PMU_ADDR   0x0f0000c0
 
#define VR4122_RTC_ADDR   0x0f000100
 
#define VR4122_DSU_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4122_GIU_ADDR   0x0f000140
 
#define VR4122_PIU_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4122_AIU_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4122_KIU_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4122_DSIU_ADDR   0x0f000820
 
#define VR4122_LED_ADDR   0x0f000180
 
#define VR4122_SIU_ADDR   0x0f000800
 
#define VR4122_HSP_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4122_FIR_ADDR   0x0f000840 /* XXX */
 
#define VR4122_MEMCON_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4122_ISABRG_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4122_ECU_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4122_DCU81_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4122_CSI81_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4122_GIU81_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4122_SIU1_ADDR   VRIP_NO_ADDR /* XXX: no register */
 
#define VR4122_SCU_ARR   0x0f001000
 
#define VR4122_SDRAMU_ADDR   0x0f000400
 
#define VR4122_PCI_ADDR   0x0f000c00
 
#define VR4122_PCICONF_ADDR   0x0f000d00
 
#define VR4122_CSI_ADDR   0x0f0001a0
 
#define VRIP_INTR_BCU   25
 
#define VRIP_INTR_CSI   24
 
#define VRIP_INTR_SCU   23
 
#define VRIP_INTR_PCI   22
 
#define VRIP_INTR_LCD   22 /* 4181 */
 
#define VRIP_INTR_DSIU   21
 
#define VRIP_INTR_DCU81   21 /* 4181 */
 
#define VRIP_INTR_FIR   20
 
#define VRIP_INTR_TCLK   19
 
#define VRIP_INTR_CSI81   19 /* 4181 */
 
#define VRIP_INTR_HSP   18
 
#define VRIP_INTR_ECU   18 /* 4181 */
 
#define VRIP_INTR_LED   17
 
#define VRIP_INTR_RTCL2   16
 
#define VRIP_INTR_DOZEPIU   13
 
#define VRIP_INTR_CLKRUN   12
 
#define VRIP_INTR_SOFT   11
 
#define VRIP_INTR_WRBERR   10
 
#define VRIP_INTR_SIU   9
 
#define VRIP_INTR_GIU   8
 
#define VRIP_INTR_KIU   7
 
#define VRIP_INTR_AIU   6
 
#define VRIP_INTR_PIU   5
 
#define VRIP_INTR_ETIMER   3
 
#define VRIP_INTR_RTCL1   2
 
#define VRIP_INTR_POWER   1
 
#define VRIP_INTR_BAT   0
 

Macro Definition Documentation

◆ VR4102_AIU_ADDR

#define VR4102_AIU_ADDR   0x0b000160

Definition at line 89 of file vripreg.h.

◆ VR4102_BCU_ADDR

#define VR4102_BCU_ADDR   0x0b000000

Definition at line 79 of file vripreg.h.

◆ VR4102_CMU_ADDR

#define VR4102_CMU_ADDR   0x0b000060

Definition at line 82 of file vripreg.h.

◆ VR4102_CSI81_ADDR

#define VR4102_CSI81_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 100 of file vripreg.h.

◆ VR4102_CSI_ADDR

#define VR4102_CSI_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 107 of file vripreg.h.

◆ VR4102_DCU81_ADDR

#define VR4102_DCU81_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 99 of file vripreg.h.

◆ VR4102_DCU_ADDR

#define VR4102_DCU_ADDR   0x0b000040

Definition at line 81 of file vripreg.h.

◆ VR4102_DMAAU_ADDR

#define VR4102_DMAAU_ADDR   0x0b000020

Definition at line 80 of file vripreg.h.

◆ VR4102_DSIU_ADDR

#define VR4102_DSIU_ADDR   0x0b0001a0

Definition at line 91 of file vripreg.h.

◆ VR4102_DSU_ADDR

#define VR4102_DSU_ADDR   0x0b0000e0

Definition at line 86 of file vripreg.h.

◆ VR4102_ECU_ADDR

#define VR4102_ECU_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 98 of file vripreg.h.

◆ VR4102_FIR_ADDR

#define VR4102_FIR_ADDR   0x0b000000 /* XXX */

Definition at line 95 of file vripreg.h.

◆ VR4102_GIU81_ADDR

#define VR4102_GIU81_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 101 of file vripreg.h.

◆ VR4102_GIU_ADDR

#define VR4102_GIU_ADDR   0x0b000100

Definition at line 87 of file vripreg.h.

◆ VR4102_HSP_ADDR

#define VR4102_HSP_ADDR   0x0c000020

Definition at line 94 of file vripreg.h.

◆ VR4102_ICU_ADDR

#define VR4102_ICU_ADDR   0x0b000080

Definition at line 83 of file vripreg.h.

◆ VR4102_ISABRG_ADDR

#define VR4102_ISABRG_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 97 of file vripreg.h.

◆ VR4102_KIU_ADDR

#define VR4102_KIU_ADDR   0x0b000180

Definition at line 90 of file vripreg.h.

◆ VR4102_LED_ADDR

#define VR4102_LED_ADDR   0x0b000240

Definition at line 92 of file vripreg.h.

◆ VR4102_MEMCON_ADDR

#define VR4102_MEMCON_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 96 of file vripreg.h.

◆ VR4102_PCI_ADDR

#define VR4102_PCI_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 105 of file vripreg.h.

◆ VR4102_PCICONF_ADDR

#define VR4102_PCICONF_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 106 of file vripreg.h.

◆ VR4102_PIU_ADDR

#define VR4102_PIU_ADDR   0x0b000120

Definition at line 88 of file vripreg.h.

◆ VR4102_PMU_ADDR

#define VR4102_PMU_ADDR   0x0b0000a0

Definition at line 84 of file vripreg.h.

◆ VR4102_RTC_ADDR

#define VR4102_RTC_ADDR   0x0b0000c0

Definition at line 85 of file vripreg.h.

◆ VR4102_SCU_ARR

#define VR4102_SCU_ARR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 103 of file vripreg.h.

◆ VR4102_SDRAMU_ADDR

#define VR4102_SDRAMU_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 104 of file vripreg.h.

◆ VR4102_SIU1_ADDR

#define VR4102_SIU1_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 102 of file vripreg.h.

◆ VR4102_SIU_ADDR

#define VR4102_SIU_ADDR   0x0c000000

Definition at line 93 of file vripreg.h.

◆ VR4122_AIU_ADDR

#define VR4122_AIU_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 121 of file vripreg.h.

◆ VR4122_BCU_ADDR

#define VR4122_BCU_ADDR   0x0f000000

Definition at line 111 of file vripreg.h.

◆ VR4122_CMU_ADDR

#define VR4122_CMU_ADDR   0x0f000060

Definition at line 114 of file vripreg.h.

◆ VR4122_CSI81_ADDR

#define VR4122_CSI81_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 132 of file vripreg.h.

◆ VR4122_CSI_ADDR

#define VR4122_CSI_ADDR   0x0f0001a0

Definition at line 139 of file vripreg.h.

◆ VR4122_DCU81_ADDR

#define VR4122_DCU81_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 131 of file vripreg.h.

◆ VR4122_DCU_ADDR

#define VR4122_DCU_ADDR   0x0f000040

Definition at line 113 of file vripreg.h.

◆ VR4122_DMAAU_ADDR

#define VR4122_DMAAU_ADDR   0x0f000020

Definition at line 112 of file vripreg.h.

◆ VR4122_DSIU_ADDR

#define VR4122_DSIU_ADDR   0x0f000820

Definition at line 123 of file vripreg.h.

◆ VR4122_DSU_ADDR

#define VR4122_DSU_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 118 of file vripreg.h.

◆ VR4122_ECU_ADDR

#define VR4122_ECU_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 130 of file vripreg.h.

◆ VR4122_FIR_ADDR

#define VR4122_FIR_ADDR   0x0f000840 /* XXX */

Definition at line 127 of file vripreg.h.

◆ VR4122_GIU81_ADDR

#define VR4122_GIU81_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 133 of file vripreg.h.

◆ VR4122_GIU_ADDR

#define VR4122_GIU_ADDR   0x0f000140

Definition at line 119 of file vripreg.h.

◆ VR4122_HSP_ADDR

#define VR4122_HSP_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 126 of file vripreg.h.

◆ VR4122_ICU_ADDR

#define VR4122_ICU_ADDR   0x0f000080

Definition at line 115 of file vripreg.h.

◆ VR4122_ISABRG_ADDR

#define VR4122_ISABRG_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 129 of file vripreg.h.

◆ VR4122_KIU_ADDR

#define VR4122_KIU_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 122 of file vripreg.h.

◆ VR4122_LED_ADDR

#define VR4122_LED_ADDR   0x0f000180

Definition at line 124 of file vripreg.h.

◆ VR4122_MEMCON_ADDR

#define VR4122_MEMCON_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 128 of file vripreg.h.

◆ VR4122_PCI_ADDR

#define VR4122_PCI_ADDR   0x0f000c00

Definition at line 137 of file vripreg.h.

◆ VR4122_PCICONF_ADDR

#define VR4122_PCICONF_ADDR   0x0f000d00

Definition at line 138 of file vripreg.h.

◆ VR4122_PIU_ADDR

#define VR4122_PIU_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 120 of file vripreg.h.

◆ VR4122_PMU_ADDR

#define VR4122_PMU_ADDR   0x0f0000c0

Definition at line 116 of file vripreg.h.

◆ VR4122_RTC_ADDR

#define VR4122_RTC_ADDR   0x0f000100

Definition at line 117 of file vripreg.h.

◆ VR4122_SCU_ARR

#define VR4122_SCU_ARR   0x0f001000

Definition at line 135 of file vripreg.h.

◆ VR4122_SDRAMU_ADDR

#define VR4122_SDRAMU_ADDR   0x0f000400

Definition at line 136 of file vripreg.h.

◆ VR4122_SIU1_ADDR

#define VR4122_SIU1_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 134 of file vripreg.h.

◆ VR4122_SIU_ADDR

#define VR4122_SIU_ADDR   0x0f000800

Definition at line 125 of file vripreg.h.

◆ VR4181_AIU_ADDR

#define VR4181_AIU_ADDR   0x0a000160

Definition at line 55 of file vripreg.h.

◆ VR4181_BCU_ADDR

#define VR4181_BCU_ADDR   0x0a000000

Definition at line 45 of file vripreg.h.

◆ VR4181_CMU_ADDR

#define VR4181_CMU_ADDR   0x0a000004

Definition at line 48 of file vripreg.h.

◆ VR4181_CSI81_ADDR

#define VR4181_CSI81_ADDR   0x0b000900

Definition at line 66 of file vripreg.h.

◆ VR4181_CSI_ADDR

#define VR4181_CSI_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 74 of file vripreg.h.

◆ VR4181_DCU81_ADDR

#define VR4181_DCU81_ADDR   0x0a000020

Definition at line 65 of file vripreg.h.

◆ VR4181_DCU_ADDR

#define VR4181_DCU_ADDR   VRIP_NO_ADDR

Definition at line 47 of file vripreg.h.

◆ VR4181_DMAAU_ADDR

#define VR4181_DMAAU_ADDR   VRIP_NO_ADDR

Definition at line 46 of file vripreg.h.

◆ VR4181_DSIU_ADDR

#define VR4181_DSIU_ADDR   0x0a0001a0

Definition at line 57 of file vripreg.h.

◆ VR4181_DSU_ADDR

#define VR4181_DSU_ADDR   0x0a0000e0

Definition at line 52 of file vripreg.h.

◆ VR4181_ECU_ADDR

#define VR4181_ECU_ADDR   0x0b0008e0

Definition at line 64 of file vripreg.h.

◆ VR4181_FIR_ADDR

#define VR4181_FIR_ADDR   0x0a000000 /* XXX */

Definition at line 61 of file vripreg.h.

◆ VR4181_GIU81_ADDR

#define VR4181_GIU81_ADDR   0x0b000300

Definition at line 67 of file vripreg.h.

◆ VR4181_GIU_ADDR

#define VR4181_GIU_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 53 of file vripreg.h.

◆ VR4181_HSP_ADDR

#define VR4181_HSP_ADDR   0x0a000020

Definition at line 60 of file vripreg.h.

◆ VR4181_ICU_ADDR

#define VR4181_ICU_ADDR   0x0a000080

Definition at line 49 of file vripreg.h.

◆ VR4181_ISABRG_ADDR

#define VR4181_ISABRG_ADDR   0x0b0002c0

Definition at line 63 of file vripreg.h.

◆ VR4181_KIU_ADDR

#define VR4181_KIU_ADDR   0x0a000180

Definition at line 56 of file vripreg.h.

◆ VR4181_LCD_ADDR

#define VR4181_LCD_ADDR   0x0a000400

Definition at line 68 of file vripreg.h.

◆ VR4181_LED_ADDR

#define VR4181_LED_ADDR   0x0a000240

Definition at line 58 of file vripreg.h.

◆ VR4181_MEMCON_ADDR

#define VR4181_MEMCON_ADDR   0x0a000300

Definition at line 62 of file vripreg.h.

◆ VR4181_PCI_ADDR

#define VR4181_PCI_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 72 of file vripreg.h.

◆ VR4181_PCICONF_ADDR

#define VR4181_PCICONF_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 73 of file vripreg.h.

◆ VR4181_PIU_ADDR

#define VR4181_PIU_ADDR   0x0a000122

Definition at line 54 of file vripreg.h.

◆ VR4181_PMU_ADDR

#define VR4181_PMU_ADDR   0x0a0000a0

Definition at line 50 of file vripreg.h.

◆ VR4181_RTC_ADDR

#define VR4181_RTC_ADDR   0x0a0000c0

Definition at line 51 of file vripreg.h.

◆ VR4181_SCU_ARR

#define VR4181_SCU_ARR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 70 of file vripreg.h.

◆ VR4181_SDRAMU_ADDR

#define VR4181_SDRAMU_ADDR   VRIP_NO_ADDR /* XXX: no register */

Definition at line 71 of file vripreg.h.

◆ VR4181_SIU1_ADDR

#define VR4181_SIU1_ADDR   0x0c000000

Definition at line 69 of file vripreg.h.

◆ VR4181_SIU_ADDR

#define VR4181_SIU_ADDR   0x0c000010

Definition at line 59 of file vripreg.h.

◆ VRIP_INTR_AIU

#define VRIP_INTR_AIU   6

Definition at line 287 of file vripreg.h.

◆ VRIP_INTR_BAT

#define VRIP_INTR_BAT   0

Definition at line 293 of file vripreg.h.

◆ VRIP_INTR_BCU

#define VRIP_INTR_BCU   25

Definition at line 265 of file vripreg.h.

◆ VRIP_INTR_CLKRUN

#define VRIP_INTR_CLKRUN   12

Definition at line 281 of file vripreg.h.

◆ VRIP_INTR_CSI

#define VRIP_INTR_CSI   24

Definition at line 266 of file vripreg.h.

◆ VRIP_INTR_CSI81

#define VRIP_INTR_CSI81   19 /* 4181 */

Definition at line 274 of file vripreg.h.

◆ VRIP_INTR_DCU81

#define VRIP_INTR_DCU81   21 /* 4181 */

Definition at line 271 of file vripreg.h.

◆ VRIP_INTR_DOZEPIU

#define VRIP_INTR_DOZEPIU   13

Definition at line 280 of file vripreg.h.

◆ VRIP_INTR_DSIU

#define VRIP_INTR_DSIU   21

Definition at line 270 of file vripreg.h.

◆ VRIP_INTR_ECU

#define VRIP_INTR_ECU   18 /* 4181 */

Definition at line 276 of file vripreg.h.

◆ VRIP_INTR_ETIMER

#define VRIP_INTR_ETIMER   3

Definition at line 290 of file vripreg.h.

Referenced by dev_vr41xx_init().

◆ VRIP_INTR_FIR

#define VRIP_INTR_FIR   20

Definition at line 272 of file vripreg.h.

◆ VRIP_INTR_GIU

#define VRIP_INTR_GIU   8

Definition at line 285 of file vripreg.h.

Referenced by dev_vr41xx_init().

◆ VRIP_INTR_HSP

#define VRIP_INTR_HSP   18

Definition at line 275 of file vripreg.h.

◆ VRIP_INTR_KIU

#define VRIP_INTR_KIU   7

Definition at line 286 of file vripreg.h.

Referenced by dev_vr41xx_init().

◆ VRIP_INTR_LCD

#define VRIP_INTR_LCD   22 /* 4181 */

Definition at line 269 of file vripreg.h.

◆ VRIP_INTR_LED

#define VRIP_INTR_LED   17

Definition at line 277 of file vripreg.h.

◆ VRIP_INTR_PCI

#define VRIP_INTR_PCI   22

Definition at line 268 of file vripreg.h.

◆ VRIP_INTR_PIU

#define VRIP_INTR_PIU   5

Definition at line 288 of file vripreg.h.

◆ VRIP_INTR_POWER

#define VRIP_INTR_POWER   1

Definition at line 292 of file vripreg.h.

◆ VRIP_INTR_RTCL1

#define VRIP_INTR_RTCL1   2

Definition at line 291 of file vripreg.h.

◆ VRIP_INTR_RTCL2

#define VRIP_INTR_RTCL2   16

Definition at line 278 of file vripreg.h.

◆ VRIP_INTR_SCU

#define VRIP_INTR_SCU   23

Definition at line 267 of file vripreg.h.

◆ VRIP_INTR_SIU

#define VRIP_INTR_SIU   9

Definition at line 284 of file vripreg.h.

Referenced by dev_vr41xx_init(), and MACHINE_SETUP().

◆ VRIP_INTR_SOFT

#define VRIP_INTR_SOFT   11

Definition at line 282 of file vripreg.h.

◆ VRIP_INTR_TCLK

#define VRIP_INTR_TCLK   19

Definition at line 273 of file vripreg.h.

◆ VRIP_INTR_WRBERR

#define VRIP_INTR_WRBERR   10

Definition at line 283 of file vripreg.h.

◆ VRIP_NO_ADDR

#define VRIP_NO_ADDR   0x00000000

Definition at line 41 of file vripreg.h.


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