61 #define DEV_JAZZ_LENGTH 0x280 62 #define DEV_JAZZ_TICKSHIFT 14 63 #define PICA_TIMER_IRQ 15 151 unsigned char *
data,
size_t len,
int writeflag)
155 int i, enab_writeflag;
158 unsigned char tr[
sizeof(uint32_t)];
162 fatal(
"[ dev_jazz_dma_controller(): writeflag=%i, len=%i, data =",
163 writeflag, (
int)len);
164 for (i=0; i<len; i++)
165 fatal(
" %02x", data[i]);
166 fatal(
" mode=%08x enable=%08x count=%08x addr=%08x",
174 fatal(
"[ dev_jazz_dma_controller(): dma not enabled? ]\n");
181 if (enab_writeflag != writeflag) {
182 fatal(
"[ dev_jazz_dma_controller(): wrong direction? ]\n");
195 phys_addr = (tr[0] << 24) + (tr[1] << 16) +
196 (tr[2] << 8) + tr[3];
198 phys_addr = (tr[3] << 24) + (tr[2] << 16) +
199 (tr[1] << 8) + tr[0];
201 phys_addr += (dma_addr & 0xfff);
208 if ((phys_addr & 15) == 0 && i + 15 <= (int32_t)len)
210 if ((phys_addr & 255) == 0 && i + 255 <= (int32_t)len)
227 static void timer_tick(
struct timer *
t,
void *extra)
270 uint64_t idata = 0, odata = 0;
276 regnr = relative_addr /
sizeof(uint32_t);
278 switch (relative_addr) {
281 fatal(
"[ jazz: unimplemented write to R4030_SYS_CONFIG" 282 ", data=0x%08x ]\n", (
int)idata);
343 printf(
"R4030_SYS_ISA_VECTOR: w=%i\n", writeflag);
349 if (x & (1 << odata))
378 int old_assert_3 = (0x7fff &
380 int old_assert_6 = (0x8000 &
382 int new_assert_3, new_assert_6;
391 if (old_assert_3 && !new_assert_3)
393 else if (!old_assert_3 && new_assert_3)
396 if (old_assert_6 && !new_assert_6)
398 else if (!old_assert_6 && new_assert_6)
405 fatal(
"[ jazz: unimplemented write to address 0x%x" 406 ", data=0x%02x ]\n", (
int)relative_addr,
409 fatal(
"[ jazz: unimplemented read from address 0x%x" 410 " ]\n", (
int)relative_addr);
424 uint64_t idata = 0, odata = 0;
430 regnr = relative_addr /
sizeof(uint32_t);
432 switch (relative_addr) {
436 debug(
"[ jazz_led: write to LED: 0x%02x ]\n",
444 fatal(
"[ jazz_led: unimplemented write to address 0x%x" 445 ", data=0x%02x ]\n", (
int)relative_addr,
448 fatal(
"[ jazz_led: unimplemented read from address 0x%x" 449 " ]\n", (
int)relative_addr);
470 uint64_t idata = 0, odata = 0;
475 switch (relative_addr) {
486 idata = ((idata ^ 0xff) & 0xff) << 8;
489 debug(
"[ jazz_isa_a0: setting isa_int_enable_mask " 498 fatal(
"[ jazz_isa_a0: unimplemented write to " 499 "address 0x%x, data=0x%02x ]\n",
500 (
int)relative_addr, (
int)idata);
502 fatal(
"[ jazz_isa_a0: unimplemented read from " 503 "address 0x%x ]\n", (
int)relative_addr);
522 uint64_t idata = 0, odata = 0;
527 switch (relative_addr) {
537 idata = (idata ^ 0xff) & 0xff;
540 debug(
"[ jazz_isa_20: setting isa_int_enable_mask " 549 fatal(
"[ jazz_isa_20: unimplemented write to " 550 "address 0x%x, data=0x%02x ]\n",
551 (
int)relative_addr, (
int)idata);
553 fatal(
"[ jazz_isa_20: unimplemented read from " 554 "address 0x%x ]\n", (
int)relative_addr);
574 uint64_t idata = 0, odata = 0;
580 switch (relative_addr) {
583 for (i=0; i<15; i++) {
601 fatal(
"[ jazzio: unimplemented write to address 0x%x" 602 ", data=0x%02x ]\n", (
int)relative_addr,
605 fatal(
"[ jazzio: unimplemented read from address 0x%x" 606 " ]\n", (
int)relative_addr);
639 for (i=0; i<16; i++) {
642 snprintf(n,
sizeof(n),
"%s.jazz.%i",
644 memset(&templ, 0,
sizeof(templ));
652 for (i=0; i<16; i++) {
655 snprintf(n,
sizeof(n),
"%s.jazz.isa.%i",
657 memset(&templ, 0,
sizeof(templ));
675 snprintf(tmpstr,
sizeof(tmpstr),
"%s.jazz.%i",
681 dev_jazz_access, (
void *)d,
DM_DEFAULT, NULL);
685 0x08000f000ULL, 4, dev_jazz_led_access, (
void *)d,
689 0x90000020ULL, 2, dev_jazz_20_access, (
void *)d,
DM_DEFAULT, NULL);
692 0x900000a0ULL, 2, dev_jazz_a0_access, (
void *)d,
DM_DEFAULT, NULL);
695 0xf0000000ULL, 4, dev_jazz_jazzio_access, (
void *)d,
699 d->timer =
timer_add(100.0, timer_tick, d);
uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
#define R4030_SYS_TL_IVALID
void fatal(const char *fmt,...)
size_t dev_jazz_dma_controller(void *dma_controller_data, unsigned char *data, size_t len, int writeflag)
void(* interrupt_assert)(struct interrupt *)
struct interrupt mips_irq_3
#define R4030_SYS_TL_LIMIT
void jazz_interrupt_deassert(struct interrupt *interrupt)
void jazz_isa_interrupt_assert(struct interrupt *interrupt)
struct interrupt mips_irq_4
void interrupt_handler_register(struct interrupt *templ)
uint32_t isa_int_enable_mask
void(* interrupt_deassert)(struct interrupt *)
#define R4030_DMA_ENAB_WRITE
uint32_t isa_int_asserted
#define R4030_SYS_IT_VALUE
void jazz_interrupt_assert(struct interrupt *interrupt)
int pending_timer_interrupts
uint64_t dma_translation_table_base
#define R4030_SYS_DMA1_REGS
#define CHECK_ALLOCATION(ptr)
#define R4030_SYS_ISA_VECTOR
struct interrupt mips_irq_6
#define R4030_DMA_ENAB_RUN
int(* memory_rw)(struct cpu *cpu, struct memory *mem, uint64_t vaddr, unsigned char *data, size_t len, int writeflag, int cache_flags)
struct timer * timer_add(double freq, void(*timer_tick)(struct timer *timer, void *extra), void *extra)
#define INTERRUPT_ASSERT(istruct)
void jazz_isa_interrupt_deassert(struct interrupt *interrupt)
uint64_t dma_translation_table_limit
#define INTERRUPT_CONNECT(name, istruct)
#define R4030_SYS_IT_STAT
void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len, uint64_t data)
void memory_device_register(struct memory *mem, const char *, uint64_t baseaddr, uint64_t len, int(*f)(struct cpu *, struct memory *, uint64_t, unsigned char *, size_t, int, void *), void *extra, int flags, unsigned char *dyntrans_data)
#define R4030_SYS_DMA0_REGS
#define R4030_SYS_TL_BASE
void machine_add_tickfunction(struct machine *machine, void(*func)(struct cpu *, void *), void *extra, int clockshift)
void reassert_isa_interrupts(struct jazz_data *d)
#define R4030_SYS_EXT_IMASK
#define DEV_JAZZ_TICKSHIFT
#define INTERRUPT_DEASSERT(istruct)
struct interrupt jazz_timer_irq